Applies to Exostiv Dashboard for Xilinx, devices with GTH transceivers.
In its Product Guide 182 page 65, Xilinx reports that there is a potential bug in the initialization sequence of GTH’s CPLL, that may result in an ‘failure state’. In this state no or an incorrect output clock may be generated by the GTH’s CPLL.
It results in Exostiv Probe not being able to connect to the target FPGA.
The fix proposed by Xilinx – which affects the PLL start-up sequence will be implemented in a future release of Exostiv Dashboard.
Current workaround:
From Exostiv Dashboard version 1.10.0, the user can force the selection of the used transceivers PLL (CPLL or QPLL).
If you experience the above issue (not connection on GTH when using the CPLL), please re-generate your Exostiv IP and make sure you select the QPLL (this may force you to change the data rate).
